An embedded JPEG compression scheme with mixed-signal near-sensor DCT processing
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- This master thesis presents an innovative embedded JPEG compression scheme with mixed-signal near-sensor 2D DCT processing, implemented on the CMOS imager System On Chip (SoC) MANTIS developed at UCLouvain. The goal of this work is to enable efficient image compression while minimizing power consumption by working in the analog domain. The thesis begins with an in-depth explanation of the JPEG compression algorithm and definition of image quality metrics. Subsequently, the focus shifts towards exploring approximations of the 2D DCT suitable for analog implementation. These approximations are meticulously detailed, taking into account the unique characteristics and constraints of the analog voltage mode MAC units with programmable weights embedded in MANTIS. The proposed compression scheme is implemented on the SoC MANTIS developed at UCLouvain, leveraging its capabilities and highlighting his limitations for future improvements. Simulation results are presented to demonstrate the effectiveness of the scheme. The achieved image compression ratio is 3.39 bits per pixel (bpp) while maintaining an average Peak Signal-to-Noise Ratio (PSNR) of 27dB and consuming only 266 pJ/pixel, validating the scheme’s energy-efficient design. The findings of this thesis contribute to the field of embedded image processing, particularly in the context of mixed-signal near-sensor architectures. The successful implementation on the SoC MANTIS developed at UCLouvain demonstrates the feasibility and practicality of the proposed scheme. It offers a promising solution for achieving high-quality image compression with reduced power consumption, opening doors for various applications in areas such as wireless imaging systems, resource-constrained devices, and Internet of Things (IoT) applications.