ATTENTION/WARNING - NE PAS DÉPOSER ICI/DO NOT SUBMIT HERE

Ceci est la version de TEST de DIAL.mem. Veuillez ne pas soumettre votre mémoire sur ce site mais bien à l'URL suivante: 'https://thesis.dial.uclouvain.be'.
This is the TEST version of DIAL.mem. Please use the following URL to submit your master thesis: 'https://thesis.dial.uclouvain.be'.
 

RF characterization of the back-gate contact on Fully Depleted SOI MOSFETs

Vanbrabant, Martin
(2020)

Files

Vanbrabant_12291500_2020.pdf
  • Open access
  • Adobe PDF
  • 2.78 MB
Download

Details

Supervisors
Raskin, Jean-Pierre
Faculty
Ecole polytechnique de Louvain
Degree label
Master [120] : ingénieur civil électricien
Abstract
Thanks to the thin buried-oxide, the UTBB FDSOI technology with a highly doped region under the BOX is one of the main candidates for future RF applications. One of the most interesting feature of this technology is the possibility to tune the threshold voltage, compensate variability issues and improve the overall device performance. In this work, the impact of the back-gate bias is mainly studied on the threshold voltage and RF FoMs of the front and back-gates.