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Energy-aware scheduling for ISA-heterogeneous clusters: from process-level power estimations to cluster-wide energy efficiency

(2024)

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Arys_41031900_Carlier_32541900_2024.pdf
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Abstract
Hardware heterogeneity, and more specifically CPU architecture heterogeneity, is becoming increasingly prevalent in cloud data centers. Recently, the Ampere Computing supplier released a new processor family for the Cloud Computing market, highlighting energy efficiency and sustainability, and offering a compelling alternative to Intel's performance-driven CPUs. The objective of this thesis is to leverage this source of heterogeneity for smarter and more energy-efficient resource management. More specifically, our work targets energy-aware scheduling for the Function as a Service (FaaS) deployment model, where cloud providers commonly rely on a Round-Robin or consolidation approach to decide on a function-to-machine placement. Our methodology utilises apriori process-level power consumption measurements to characterise the energy affinity of serverless functions towards our two heterogeneous CPUs. We designed two constraint programming static schedulers: an Energy-aware scheduler aiming at being the most energy-efficient based on these apriori measurements and a Cores-aware scheduler focusing on reducing the number of CPU cores required to run a given set of functions. However, collecting the energy consumption at the function level is not a trivial task. For this purpose, we rely on PowerAPI, a software toolchain to estimate the power consumption of individual processes, which we extended to support Ampere CPUs. To evaluate our schedulers, we designed benchmarks and workloads based on our implementation of 22 orchestrator-agnostic serverless functions covering multiple programming languages and behaviours. Our evaluation results show that our proposed Energy-aware scheduler reduces the total energy consumed by 2% to 5% on average, and up to 19% in specific configurations compared to common scheduling strategies and our Cores-aware implementation.