Optimising and parallelising instructions in ARM Cortex-M processor for ultra-low-power arrhythmia detection algorithm on electrocardiogram data
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- Heart rhythm disorders and related conditions are becoming increasingly common, due to the ageing population. Electrocardiogram (ECG) is the main diagnostic method used to detect arrhythmia and determine the causes. Research has focused on devices that allow data to be taken regularly and allow physicians to track patients over longer periods. The device on which this thesis is based, SleepRider, is a solution that runs an ultra-low power (ULP) detection and classification software, written in C. This master thesis is focused on the pre-processing part of the algorithm. In this work, ways to optimise the performance have been explored, with the vectorisation having been identified as the ideal solution as it fitted well the characteristics offered by microprocessors compatible with SleepRider, the Cortex-M4, and Cortex-M33, after a careful study of the principles of parallelisation and vectorisation. These core, designed by ARM, offer hardware features such as SIMD intrinsics or vector processing extension. The master thesis studied the gradual implementation of SIMD intrinsics, displaying a 45.47% decrease of cycle output over the pre-processing algorithm. It highlights the potential of the parellising algorithm and the perspective it offers for future works.